This page provides an overview of selected scientific publications authored by byteLAKE’s CTO, Krzysztof Rojek, and his colleagues. Krzysztof’s remarkable accomplishments have earned recognition from the scientific community, culminating in the awarding of his PhD and subsequent promotion to Doctor of Science (DSc, dr habilitowany). For a more comprehensive list, you can explore Google Scholar here.

Select Publications:

• R. Wyrzykowski, K. Rojek, L. Szustak, Model-driven adaptation of double-precision matrix multiplication to the Cell processor architecture, Parallel Computing 38(4-5), 2012, 260-276
• R. Wyrzykowski, L. Szustak, K. Rojek, Parallelization of 2D MPDATA EULAG algorithm on hybrid architectures with GPU accelerators, Parallel Computing 40(8), 2014, 425-447
• K. A. Rojek, M. Ciznicki, B. Rosa, P. Kopta, M. Kulczewski, K. Kurowski, Z.P. Piotrowski, L. Szustak, D.K. Wojcik, R. Wyrzykowski, Adaptation of fluid model EULAG to graphics processing unit architecture, Concurrency and Computation: Practice and Experience 27(4), 2015, 937-957
• K. Rojek, L. Szustak, R. Wyrzykowski, Parallelization and automatic adaptation of numerical algorithm to hybrid architectures with GPU acceleration, PWN, 2015, 203
• K. Rojek, R. Wyrzykowski, Performance modeling of 3D MPDATA simulations on GPU cluster, Journal of Supercomputing 73(2), 2017, 664-675
• K. Rojek, R. Wyrzykowski, L. Kuczynski, Systematic adaptation of stencil-based 3D MPDATA algorithm to GPU architectures, Concurrency and Computation: Practice and Experience 29(9), 2017
• K. Rojek, A. Illic, R. Wyrzykowski, L. Sousa, Energy-aware Mechanism for Stencil-Based MPDATA Algorithm with Constraints, Concurrency and Computation: Practice and Experience 29(8), 2017
• K. Rojek, E.S. Quintana-Orti, R. Wyrzykowski, Modeling Power Consumption of 3D MPDATA on ARM and Intel Multicore Architectures, Journal of Supercomputing, DOI: 10.1007/s11227-017-2020-z, 2017
• L Szustak, K. Rojek, T. Olas, L. Kuczynski, K. Halbiniak, P. Gepner, Adaptation of MPDATA Heterogeneous Stencil Computation to Intel Xeon Phi Coprocessor, Scientific Programming 2015, 2015, 1-14
• K. Rojek, L. Szustak, Adaptation of double-precision matrix multiplication to the cell broad-band engine architecture, Proc. of Int. Conf. on PPAM, LNCS 6067, 2009, 535-546
• R. Wyrzykowski, K. Rojek, L. Szustak, Using blue gene/P and GPUs to accelerate computations in the EULAG model, Proc. of Int. Conf. on LSSC, LNCS 7116, 2011, 670-677
• K. Rojek, L. Szustak, Parallelization of EULAG model on multicore architectures with GPU accelerators, Proc. of Int. Conf. on PPAM, LNCS 7204, 2011, 391-400
• R. Wyrzykowski, L. Szustak, K. Rojek, A. Tomas, Towards efficient decomposition and parallelization of MPDATA on hybrid CPU-GPU cluster, Proc. of Int. Conf. on LSSC, LNCS 8353, 2013, 457-464
• K. Rojek, L. Szustak, R. Wyrzykowski, Performance analysis for stencil-based 3D MPDATA algorithm on GPU architecture, Proc. of Int. Conf. on PPAM, LNCS 8384, 2013, 145-154
• L. Szustak, K. Rojek, P. Gepner, Using Intel Xeon Phi coprocessor to accelerate computa-tions in MPDATA algorithm, Proc. of Int. Conf. on PPAM, LNCS 8384, 2013, 582-592
• B. Rosa, M. Ciznicki, K. Rojek, D. Wojcik, P. Smolarkiewicz, R. Wyrzykowski, Porting mul-tiscale fluid model EULAG to modern heterogeneous architectures, International Journal of Applied Physics and Mathematics 4(3), 2014, 188-195
• L. Szustak, K. Rojek, R. Wyrzykowski, P. Gepner, Toward efficient distribution of MPDATA stencil computation on Intel MIC architecture, Proc. of the 1st Int. Workshop on HiStencils’ 14, 2014, 51-56
• D Wojcik, M. Ciznicki, P. Kopta, M. Kulczewski, K. Kurowski, Z. Piotrowski, K. Rojek, B. Rosa, L. Szustak, R. Wyrzykowski, Adaptation of the anelastic solver EULAG to high performance computing architectures, EGU General Assembly Conference Abstracts 16, 2014, 11945
• B. Rosa, L. Szustak, A.A. Wyszogrodzki, K. Rojek, D.K. Wojcik, R. Wyrzykowski, Adaptation of Multidimensional Positive Definite Advection Transport Algorithm to modern high-performance computing platforms, International Journal of Modeling and Optimization 5(3), 2015, 171-176
• K. Rojek, R. Wyrzykowski, Parallelization of 3D MPDATA Algorithm Using Many Graphics Processors, Proc. of Int. Conf. on Parallel Computing Technologies, LNCS 9251, 2015, 445-457
• K. Rojek, M. Barreda, E.S. Quintana-Orti, R. Wyrzykowski, Energy Consumption of Stencil-Based MPDATA Algorithm, Proc. of the 16th Int. Conf. on CMMSE, 2016, 1104-1107
• K. Rojek, R. Wyrzykowski, Improving energy efficiency of MPDATA on GPU-based super-computers using mixed precision arithmetic, Proc. of the 2nd Workshop on Power-Aware Computing (PACO 2017), 2017, 17-20
• Krzysztof Rojek byteLAKE Wroclaw, Poland Czestochowa University of Technology Czestochowa, Poland; Marcin Rojek byteLAKE Wroclaw, Poland; Viraj R. Paropkari Xilinx San Jose, CA, USA, CFD Acceleration with FPGA, https://www.bytelake.com/en/SC19-H2RC, 2019